Renesas H8/36912 Series User Manual page 70

[Prior to executing BSET]
MOV.B
MOV.B
MOV.B
Input/output
Pin state
PCR5
PDR5
RAM0
[BSET instruction executed]
BSET
[After executing BSET]
MOV.B
MOV.B
Input/output
Pin state
PCR5
PDR5
RAM0
Bit Manipulation in a Register Containing a Write-Only Bit
Example 3: BCLR instruction executed designating port 5 control register PCR5
P57 and P56 are input pins, with a low-level signal input at P57 and a high-level signal input at
P56. P55 to P50 are output pins that output low-level signals. An example of setting the P50 pin as
an input pin by the BCLR instruction is shown below. It is assumed that a high-level signal will be
input to this input pin.
Rev. 1.00, 11/03, page 42 of 376
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#80, R0L
R0L, @RAM0
R0L, @PDR5
P57 P56
Input Input
Low High
level level
0 0
1 0
1 0
#0, @RAM0
@RAM0, R0L
R0L, @PDR5
P57 P56
Input Input
Low High
level level
0 0
1 0
1 0
The PDR5 value (H'80) is written to a work area in
memory (RAM0) as well as to PDR5.
P55 P54 P53
Output Output Output
Low Low Low
level level level
1 1 1
0 0 0
0 0 0
The BSET instruction is executed designating the PDR5
work area (RAM0).
The work area (RAM0) value is written to PDR5.
P55 P54 P53
Output Output Output
Low Low Low
level level level
1 1 1
0 0 0
0 0 0
P52 P51 P50
Output Output Output
Low Low Low
level level level
1 1 1
0 0 0
0 0 0
P52 P51 P50
Output Output Output
Low Low High
level level level
1 1 1
0 0 1
0 0 1