Renesas H8/36912 Series User Manual page 367

• Block transfer instructions
Mnemonic
EEPMOV. B
EEPMOV
EEPMOV. W
Notes: 1. The number of states in cases where the instruction code and its operands are located
in on-chip memory is shown here. For other cases see Appendix A.3, Number of
Execution States.
2. n is the value set in register R4L or R4.
(1) Set to 1 when a carry or borrow occurs at bit 11; otherwise cleared to 0.
(2) Set to 1 when a carry or borrow occurs at bit 27; otherwise cleared to 0.
(3) Retains its previous value when the result is zero; otherwise cleared to 0.
(4) Set to 1 when the adjustment produces a carry; otherwise retains its previous value.
(5) The number of states required for execution of an instruction that transfers data in
(6) Set to 1 when the divisor is negative; otherwise cleared to 0.
(7) Set to 1 when the divisor is zero; otherwise cleared to 0.
(8) Set to 1 when the quotient is negative; otherwise cleared to 0.
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Addressing Mode and
Instruction Length (bytes)
—
—
synchronization with the E clock is variable.
Operation
if R4L ≠ 0 then
4
repeat @R5 → @R6
R5+1 → R5
R6+1 → R6
R4L–1 → R4L
until R4L=0
else next
if R4 ≠ 0 then
4
repeat @R5 → @R6
R5+1 → R5
R6+1 → R6
R4–1 → R4
until R4=0
else next
Rev. 1.00, 11/03, page 339 of 376
No. of
States
Condition Code
I H N Z V C
— — — — — — 8+
*2
4n
— — — — — — 8+
*2
4n
*1