Renesas H8/36912 Series User Manual page 211

16-bit single-chip microcomputer
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Bit
Bit Name
2
WDON
1
B0WI
0
WRST
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Initial
Value
R/W
Description
1
R/W
Watchdog Timer On
TCWD starts counting up when the WDON bit is set to 1
and halts when the WDON bit is cleared to 0. The
watchdog timer is enabled in the initial state. When the
watchdog timer is not used, clear the WDON bit to 0.
[Setting condition]
[Clearing conditions]
1
R/W
Bit 0 Write Inhibit
This bit can be written to the WRST bit only when the
write value of the B0WI bit is 0. This bit is always read as
1.
0
R/W
Watchdog Timer Reset
[Setting condition]
[Clearing conditions]
When 1 is written to the WDON bit and 0 is written to
the B2WI bit while the TCSRWE bit = 1
Reset by the RES pin
When 0 is written to the WDON bit and 0 is written to
the B2WI bit while the TCSRWE bit = 1
When TCWD overflows and an internal reset signal is
generated
Reset by the RES pin
When 0 is written to the WRST bit and 0 is written to
the B0WI bit while the TCSRWE bit = 1
Rev. 1.00, 11/03, page 183 of 376

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