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3.1 Memory Space
Products in the 78K0R/KE3 can access a 1 MB memory space. Figures 3-1 to 3-5 show the memory maps.
F F F F F H
F F F 0 0 H
F F E F F H
F F E E 0 H
F F E D F H
F E F 0 0 H
F E E F F H
F 1 0 0 0 H
F 0 F F F H
F 0 8 0 0 H
F 0 7 F F H
F 0 0 0 0 H
E F F F F H
Data memory
space
1 0 0 0 0 H
0 F F F F H
Program
memory
space
0 0 0 0 0 H
Notes 1. Instructions can be executed from the RAM area excluding the general-purpose register area.
2. When boot swap is not used: Set the option bytes to 000C0H to 000C3H, and the on-chip debug
When boot swap is used:
3. Writing boot cluster 0 can be prohibited depending on the setting of security (see 23.7
Setting).
46
CHAPTER 3 CPU ARCHITECTURE
Figure 3-1. Memory Map (
Special function register (SFR)
256 bytes
General-purpose register
32 bytes
Note 1
RAM
4 KB
Mirror
55.75 KB
Reserved
Special function register (2nd SFR)
2 KB
Reserved
Flash memory
64 KB
security IDs to 000C4H to 000CDH.
Set the option bytes to 000C0H to 000C3H and 010C0H to 010C3H, and
the on-chip debug security IDs to 000C4H to 000CDH and 010C4H to
010CDH.
User's Manual U17854EJ9V0UD
μ
PD78F1142, 78F1142A)
0 F F F F H
Program area
0 1 0 C E H
0 1 0 C D H
On-chip debug security
ID setting area
10 bytes
0 1 0 C 4 H
0 1 0 C 3 H
Option byte area
4 bytes
0 1 0 C 0 H
0 1 0 B F H
CALLT table area
64 bytes
0 1 0 8 0 H
0 1 0 7 F H
Vector table area
128 bytes
0 1 0 0 0 H
0 0 F F F H
Program area
0 0 0 C E H
0 0 0 C D H
On-chip debug security
ID setting area
10 bytes
0 0 0 C 4 H
0 0 0 C 3 H
Option byte area
4 bytes
0 0 0 C 0 H
0 0 0 B F H
CALLT table area
64 bytes
0 0 0 8 0 H
0 0 0 7 F H
Vector table area
128 bytes
0 0 0 0 0 H
0 1 F F F H
Note 2
Note 2
Boot cluster 1
Note 2
Note 2
Note 3
Boot cluster 0
Security
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