Chapter 3 Cpu Architecture; Memory Space - NEC mPD780065 Series Preliminary User's Manual

3.1 Memory Space

µ PD780065 Subseries can access 64-Kbyte memory space respectively.
Figures 3-1 and 3-2 show memory maps.
Caution As the initial setting of the program, set the memory size switching register (IMS) and internal
expansion RAM size switching register (IXS) as follows. Setting the initial value of IMS and IXS
is prohibited.
µ PD780065
µ PD78F0066
Data memory
space
Program
memory
space

CHAPTER 3 CPU ARCHITECTURE

Memory Size Switching Register (IMS)
CAH
CCH or the value corresponding to
mask ROM version
Figure 3-1. Memory Map ( µ PD780065)
FFFFH
Special function
registers (SFRs)
256 × 8 bits
FF00H
FEFFH
General registers
32 × 8 bits
FEE0H
FEDFH
Internal high-speed RAM
1024 × 8 bits
FB00H
FAFFH
Reserved
FAE0H
FADFH
Internal buffer RAM
32 × 8 bits
FAC0H
FABFH
Reserved
F800H
F7FFH
Internal expansion RAM
4096 × 8 bits
E800H
E7FFH
External memory
18432 × 8 bits
A000H
9FFFH
Internal ROM
40960 × 8 bits
0000H
Preliminary User's Manual U13420EJ2V0UM00
Internal RAM Size Switching Register (IXS)
04H
9FFFH
Program area
1000H
0FFFH
CALLF entry area
0800H
07FFH
Program area
0080H
007FH
CALLT table area
0040H
003FH
Vector table area
0000H
43