Chapter 3 Cpu Architecture; Memory Spaces - NEC mPD780973 Series Preliminary User's Manual

3.1 Memory Spaces

The µ PD780973 Subseries can access a 64-Kbyte memory space. Figures 3-1 and 3-2 show memory maps of
the respective devices.
FFFFH
FF00H
FEFFH
FEE0H
FEDFH
FC00H
FBFFH
FA6DH
FA6CH
FA59H
Data memory
FA58H
space
FA00H
F9FFH
F900H
F8FFH
6000H
5FFFH
Program
memory
space
0000H

CHAPTER 3 CPU ARCHITECTURE

Figure 3-1. Memory Map ( µ PD780973(A))
Special Function
Registers (SFRs)
256 × 8 bits
General Registers
32 × 8 bits
Internal High-speed RAM
768 × 8 bits
Reserved
LCD Display RAM
20 × 4 bits
Reserved
EEPROM
256 × 8 bits
Reserved
Internal ROM
24576 × 8 bits
5FFFH
Program Area
1000H
0FFFH
CALLF Entry Area
0800H
07FFH
Program Area
0080H
007FH
CALLT Table Area
0040H
003FH
Vector Table Area
0000H
41