Fig. 2.2.2 Int0 Interrupt Setting Example - Renesas 4513 User Manual

APPLICATION
2.2 Interrupts
Disable Interrupts
INT0 interrupt is temporarily disabled.
Interrupt enable flag INTE
Interrupt control register V1
Set Port
Port used for INT0 interrupt is set to input port.
Set Valid Waveform
Valid waveform of INT pin is selected.
Both edges detection selected
Interrupt control register I1
Clear Interrupt Request
External interrupt activated condition is cleared.
INT0 interrupt request flag EXF0 "0"
Note when the interrupt request is cleared
When
interrupt request flag EXF0, insert the NOP instruction after the SNZ0 instruction.
Enable Interrupts
The INT0 interrupt which is temporarily disabled is enabled.
Interrupt control register V1
Interrupt enable flag INTE
" ": it can be "0" or "1."

Fig. 2.2.2 INT0 interrupt setting example

Note: The valid waveforms causing the interrupt must be retained at their level for 4 cycles or more
of system clock.
2-18
Port P3 output latch
0
is executed, considering the skip of the next instruction according to the
INT0 interrupt execution started
4513/4514 Group User's Manual
"0"
All interrupts disabled (DI instruction)
b3 b0
INT0 interrupt occurrence disabled
0
(TV1A instruction)
b3 b0
1
Set to input (OP3A instruction)
b3 b0
1 Both edges detection selected (TI1A instruction)
INT0 interrupt activated condition cleared
(SNZ0 instruction)
b3 b0
INT0 interrupt occurrence enabled
1
(TV1A instruction)
All interrupts enabled (EI instruction)
"1"