Fig. 2.4.5 Master Serial I/O Setting Example - Renesas 4513 User Manual

4500 series 4-bit single-chip microcomputer
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APPLICATION
2.4 Serial I/O
Disable Interrupts
Serial I/O interrupt is temporarily disabled.
Set Serial I/O
Clear Interrupt Request
Serial I/O interrupt activated condition is cleared.
When interrupt is
Set Interrupt
Interrupts except serial I/O is enabled
(EI instruction)
Check Serial I/O Interrupt Request
SIOF flag is checked (SNZSI instruction).
" ": it can be "0" or "1."

Fig. 2.4.5 Master serial I/O setting example

2-46
Interrupt enable flag INTE
Interrupt control register V2
Serial I/O mode register J1
Serial I/O transmit/receive
completion flag SIOF
Note when the interrupt request is cleared
When
is executed, considering the skip of the next instruction according to the
SIOF flag, insert the NOP instruction after the SNZSI instruction.
not used
Start Condition of Serial I/O operation
Slave side is enabled to receive is checked.
Pin level of control signal = "L"
Start Serial I/O Operation
Serial transfer is started (SST instruction) after checking
slave side is enabled to receive.
Execute Receive Data
Data received by serial transfer is executed.
Register SI
When serial communication is executed,
4513/4514 Group User's Manual
"0"
All interrupts disabled (DI instruction)
b3
b0
Serial I/O interrupt occurrence disabled
0
(TV2A instruction)
Internal clock selected (TJ1A instruction)
b3
b0
1 1
1
Serial I/O port selected
Dividing ratio = 4 selected
"0"
Serial I/O interrupt activated condition cleared
g0 h
(SNZSI instruction)
Set Interrupt
Serial I/O interrupt temporarily disabled is enabled.
Interrupt control register V2
Interrupt enable flag INTE
g0 h
Serial I/O Interrupt Occur
register A, register B (TABSI instruction)
to
When interrupt is used
b3
b0
Serial I/O interrupt occurrence
1
enabled (TV2A instruction)
All interrupts enabled
"1"
(EI instruction)
are repeated.

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