Master
S
OUT
S
IN
SST instruction
S
CK
Slave
SST instruction
Control signal
S
OUT
S
IN
M
–M
: the contents of master serial I/O register
0
7
S
–S
: the contents of slave serial I/O register
0
7
Rising of S
: serial input
CK
Falling of S
: serial output
CK
M
'–M
': previous MSB contents of master and slave
0
7
Fig. 2.4.4 Serial I/O transfer timing
M
'
M
M
7
0
S
'
S
7
0
S
S
S
'
0
7
M
'
M
7
0
4513/4514 Group User's Manual
M
M
M
1
2
3
S
S
S
1
2
3
S
S
S
1
2
3
M
M
M
1
2
3
APPLICATION
2.4 Serial I/O
M
M
M
4
5
6
S
S
S
4
5
6
S
S
4
5
6
M
M
M
4
5
6
7
S
7
S
7
M
7
2-43