Fig. 2.3.4 Cntr0 Output Setting Example - Renesas 4513 User Manual

Disable Interrupts
Timer 1 interrupt is temporarily disabled.
Interrupt control register V1
Stop Timer Operation
Timer 1 and prescaler are temporarily stopped.
Dividing ratio of prescaler is selected.
Set Timer Value, Select CNTR0 Output
CNTR0 output is selected.
Timer 1 count time is set.
Clear Interrupt Request
Timer 1 interrupt activated condition is cleared.
Timer 1 interrupt request flag T1F "0"
Note when the interrupt request is cleared
When
interrupt request flag T1F, insert the NOP instruction after the SNZT1 instruction.
Start Timer 1 Operation
Timer 1 and prescaler temporarily stopped are restarted.
Enable Interrupts
The timer 1 interrupt which is temporarily disabled is enabled.
Interrupt control register V1
Stop CNTR0 Output
D /CNTR0 pin is set to CNTR0 input pin, and it is set to the high-impedance state.
6
Output latch of port D
" ": it can be "0" or "1."

Fig. 2.3.4 CNTR0 output setting example

Interrupt enable flag INTE
Timer control register W1
Timer control register W6
Timer 1 reload register R1 "29
is executed, considering the skip of the next instruction according to the
Timer control register W1
Interrupt enable flag INTE
Timer control register W6
is set to "1."
6
4513/4514 Group User's Manual
"0" All interrupts disabled (DI instruction)
b3 b0
Timer 1 interrupt occurrence disabled
0
(TV1A instruction)
b3 b0
Timer 1 stop (TW1A instruction)
0
0 0
Prescaler stop
Prescaler divided by 4 selected
b3 b0
CNTR0 output selected (TW6A instruction)
0 1
"
16 Timer count value 41 set (T1AB instruction)
Timer 1 interrupt activated condition cleared
g 0 h
(SNZT1 instruction)
b3 b0
Timer 1 operation start (TW1A instruction)
1 0
1
Prescaler operation start
b3 b0
Timer 1 interrupt occurrence enabled
1
(TV1A instruction)
"1" All interrupts enabled (EI instruction)
b3 b0
CNTR0 input pin set (TW6A instruction)
0
0
APPLICATION
(SD instruction)
2.3 Timers
2-33