Renesas 4513 User Manual page 21

HARDWARE
PERFORMANCE OVERVIEW
PERFORMANCE OVERVIEW
Parameter
Number of 4513 Group
4514 Group
basic instructions
Minimum instruction execution time
ROM M34513M2
Memory sizes
M34513M4/E4
M34513M6
M34513M8/E8
M34514M6
M34514M8/E8
RAM M34513M2
M34513M4/E4
M34513M6
M34513M8/E8
M34514M6
M34514M8/E8
D –D I/O (Input is
Input/Output
0 7
examined by
ports
skip decision)
P0 –P0 I/O
0 3
P1 –P1 I/O
0 3
P2 –P2 Input
0 2
P3 –P3 I/O
0 3
P4 –P4 I/O
0 3
P5 –P5 I/O
0 3
CNTR0 I/O
CNTR1 I/O
INT0 Input
INT1 Input
Timer 1
Timers
Timer 2
Timer 3
Timer 4
A-D converter
Voltage comparator
Serial I/O
Sources
Interrupt
Nesting
Subroutine nesting
Device structure
4513 Group
Package
4514 Group
Operating temperature range
Supply voltage
Active mode
Power
dissipation
(typical value)
RAM back-up mode
1-8
123
128
0.75 s (at 4.0 MHz oscillation frequency, in high-speed mode)
2048 words 10 bits
4096 words 10 bits
6144 words 10 bits
8192 words 10 bits
6144 words 10 bits
8192 words 10 bits
128 words 4 bits
256 words 4 bits
384 words 4 bits
384 words 4 bits
384 words 4 bits
384 words 4 bits
Eight independent I/O ports;
ports D and D are also used as CNTR0 and CNTR1, respectively.
6 7
4-bit I/O port; each pin is equipped with a pull-up function and a key-on wakeup function. Both
functions can be switched by software.
4-bit I/O port; each pin is equipped with a pull-up function and a key-on wakeup function. Both
functions can be switched by software.
3-bit input port; ports P2 , P2
0
4-bit I/O port (2-bit I/O port for the 4513 Group); ports P3
INT1, respectively. The 4513 Group does not have ports P3
4-bit I/O port; The 4513 Group does not have this port.
4-bit I/O port with a direction register; The 4513 Group does not have this port.
1-bit I/O; CNTR0 pin is also used as port D
1-bit I/O; CNTR1 pin is also used as port D
1-bit input; INT0 pin is also used as port P3
1-bit input; INT1 pin is also used as port P3
8-bit programmable timer with a reload register.
8-bit programmable timer with a reload register is also used as an event counter.
8-bit programmable timer with a reload register.
8-bit programmable timer with a reload register is also used as an event counter.
10-bit wide, This is equipped with an 8-bit comparator function.
2 circuits (CMP0, CMP1)
8-bit 1
8 (two for external, four for timer, one for A-D, and one for serial I/O)
1 level
8 levels
CMOS silicon gate
32-pin plastic molded SDIP (32P4B)/LQFP(32P6B-A)
42-pin plastic molded SSOP (42P2R-A)
–20 °C to 85 °C
2.0 V to 5.5 V for Mask ROM version, 2.5 V to 5.5 V for One Time PROM version (Refer to the
electrical characteristics because the supply voltage depends on the oscillation frequency.)
1.8 mA (at V = 5.0 V, 4.0 MHz oscillation frequency, in middle- speed mode, output transis-
DD
tors in the cut-off state)
3.0 mA (at V = 5.0 V, 4.0 MHz oscillation frequency, in high-speed mode, output transistors
DD
in the cut-off state)
0.1 A (at room temperature, V
4513/4514 Group User's Manual
Function
and P2 are also used as S
1 2
0
.
6
.
7
and equipped with a key-on wakeup function.
0
and equipped with a key-on wakeup function.
1
= 5 V, output transistors in the cut-off state)
DD
, S and S , respectively.
CK OUT IN
and P3 are also used as INT0 and
1
, P3 .
2 3