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HARDWARE
FUNCTION BLOCK OPERATIONS
SERIAL I/O
The 4513/4514 Group has a built-in clock synchronous serial I/O
which can serially transmit or receive 8-bit data.
Serial I/O consists of;
• serial I/O register SI
• serial I/O mode register J1
• serial I/O transmission/reception completion flag (SIOF)
• serial I/O counter
Registers A and B are used to perform data transfer with internal
CPU, and the serial I/O pins are used for external data transfer.
The pin functions of the serial I/O pins can be set with the register
J1.
Division circuit
(divided by 2)
X
IN
S
CK
P2
/S
0
CK
S
OUT
P2
/S
1
OUT
S
IN
P2
/S
2
IN
Fig. 22 Serial I/O structure
Table 12 Serial I/O mode register
Serial I/O mode register J1
J1
Not used
3
Serial I/O internal clock dividing ratio
J1
2
selection bit
J1
Serial I/O port selection bit
1
J1
Serial I/O synchronous clock selection bit
0
Note: "R" represents read enabled, and "W" represents write enabled.
1-36
MR
3
Internal clock
1
generation circuit
0
(divided by 3)
J1
2
1
1/4
0
1/8
MSB
J1
Register B (4)
J1
0
1
Note: The output structure of S
CK
0
1
0
1
0
1
0
1
4513/4514 Group User's Manual
Table 11 Serial I/O pins
Pin
Pin function when selecting serial I/O
P2
/S
Clock I/O (S
0
CK
P2
/S
Serial data output (S
1
OUT
P2
/S
Serial data input (S
2
IN
Note: Input ports P2
–P2
0
2
Instruction clock
Serial I/O mode register J1
J1
3
J1
J1
2
Synchronous
Serial I/O counter (3)
circuit
LSB
Serial I/O register SI (8)
TSIAB
TABSI
Register A (4)
and S
pins is N-channel open-drain.
OUT
at reset : 0000
at RAM back-up : state retained
2
This bit has no function, but read/write is enabled.
Instruction clock signal divided by 8
Instruction clock signal divided by 4
Input ports P2
, P2
, P2
0
1
2
Serial I/O ports S
, S
CK
OUT
External clock
Internal clock (instruction clock divided by 4 or 8)
)
CK
)
OUT
)
IN
can be used regardless of register J1.
J1
1
0
Serial I/O interrupt
SIOF
selected
, S
/input ports P2
, P2
, P2
IN
0
1
R/W
selected
2
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