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FUNCTION BLOCK OPERATIONS
CPU
(1) Arithmetic logic unit (ALU)
The arithmetic logic unit ALU performs 4-bit arithmetic such as 4-
bit data addition, comparison, AND operation, OR operation, and
bit manipulation.
(2) Register A and carry flag
Register A is a 4-bit register used for arithmetic, transfer, ex-
change, and I/O operation.
Carry flag CY is a 1-bit flag that is set to "1" when there is a carry
with the AMC instruction (Figure 1).
It is unchanged with both A n instruction and AM instruction. The
value of A
is stored in carry flag CY with the RAR instruction (Fig-
0
ure 2).
Carry flag CY can be set to "1" with the SC instruction and cleared
to "0" with the RC instruction.
(3) Registers B and E
Register B is a 4-bit register used for temporary storage of 4-bit
data, and for 8-bit data transfer together with register A.
Register E is an 8-bit register. It can be used for 8-bit data transfer
with register B used as the high-order 4 bits and register A as the
low-order 4 bits (Figure 3).
(4) Register D
Register D is a 3-bit register.
It is used to store a 7-bit ROM address together with register A and
is used as a pointer within the specified page when the TABP p,
BLA p, or BMLA p instruction is executed (Figure 4).
TABP p instruction
PC
H
p
p
p
p
6
5
4
3
Immediate field
value p
Fig. 4 TABP p instruction execution example
Specifying address
p
p
p
2
1
0
DR
DR
DR
2
1
The contents of
register D
4513/4514 Group User's Manual
FUNCTION BLOCK OPERATIONS
(CY)
(M(DP))
(A)
Fig. 1 AMC instruction execution example
<Set>
SC instruction
Fig. 2 RAR instruction execution example
Register B
B
3
Register E
B
3
Register B
Fig. 3 Registers A, B and register E
ROM
8
PC
L
A
A
A
A
3
2
1
0
0
Middle-order 4 bits
The contents of
register A
HARDWARE
<Carry>
Addition
ALU
<Result>
<Clear>
RC instruction
CY
A
A
A
3
2
1
<Rotation>
RAR instruction
A
CY A
A
0
3
2
TAB instruction
Register A
B
B
B
A
A
2
1
0
3
2
TEAB instruction
E
E
E
E
E
E
E
7
6
5
4
3
2
1
TABE instruction
A
A
B
B
B
2
1
0
3
2
TBA instruction
Register A
4
0
Low-order 4bits
Register A (4)
Register B (4)
A
0
A
1
A
A
1
0
E
0
A
A
1
0
1-17
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