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HARDWARE
SYMBOL
SYMBOL
The symbols shown below are used in the following instruction function table and instruction list.
Symbol
A
Register A (4 bits)
B
Register B (4 bits)
DR
Register D (3 bits)
E
Register E (8 bits)
Q1
A-D control register Q1 (4 bits)
Q2
A-D control register Q2 (4 bits)
Q3
Voltage comparator control register Q3 (4 bits)
AD
Successive comparison register AD (10 bits)
J1
Serial I/O mode register J1 (4 bits)
SI
Serial I/O register SI (8 bits)
V1
Interrupt control register V1 (4 bits)
V2
Interrupt control register V2 (4 bits)
I1
Interrupt control register I1 (4 bits)
I2
Interrupt control register I2 (4 bits)
W1
Timer control register W1 (4 bits)
W2
Timer control register W2 (4 bits)
W3
Timer control register W3 (4 bits)
W4
Timer control register W4 (4 bits)
W6
Timer control register W6 (4 bits)
MR
Clock control register MR (4 bits)
K0
Key-on wakeup control register K0 (4 bits)
PU0
Pull-up control register PU0 (4 bits)
FR0
Direction register FR0 (4 bits)
X
Register X (4 bits)
Y
Register Y (4 bits)
Z
Register Z (2 bits)
Data pointer (10 bits)
DP
(It consists of registers X, Y, and Z)
PC
Program counter (14 bits)
PC
High-order 7 bits of program counter
H
PC
Low-order 7 bits of program counter
L
Stack register (14 bits
SK
SP
Stack pointer (3 bits)
CY
Carry flag
R1
Timer 1 reload register
R2
Timer 2 reload register
Timer 3 reload register
R3
R4
Timer 4 reload register
T1
Timer 1
T2
Timer 2
T3
Timer 3
Timer 4
T4
Note : The 4513/4514 Group just invalidates the next instruction when a skip is performed. The contents of program counter is not increased by 2. Accord-
ingly, the number of cycles does not change even if skip is not performed. However, the cycle count becomes "1" if the TABP p, RT, or RTS instruction
is skipped.
1-62
Contents
8)
4513/4514 Group User's Manual
Symbol
T1F
Timer 1 interrupt request flag
T2F
Timer 2 interrupt request flag
T3F
Timer 3 interrupt request flag
T4F
Timer 4 interrupt request flag
WDF1
Watchdog timer flag
WEF
Watchdog timer enable flag
INTE
Interrupt enable flag
EXF0
External 0 interrupt request flag
EXF1
External 1 interrupt request flag
P
Power down flag
ADF
A-D conversion completion flag
SIOF
Serial I/O transmission/reception completion flag
D
Port D (8 bits)
P0
Port P0 (4 bits)
P1
Port P1 (4 bits)
P2
Port P2 (3 bits)
P3
Port P3 (4 bits)
P4
Port P4 (4 bits)
P5
Port P5 (4 bits)
x
Hexadecimal variable
y
Hexadecimal variable
z
Hexadecimal variable
p
Hexadecimal variable
n
Hexadecimal constant
Hexadecimal constant
i
j
Hexadecimal constant
A
A
A
A
Binary notation of hexadecimal variable A
3
2
1
0
(same for others)
Direction of data movement
Data exchange between a register and memory
?
Decision of state shown before "?"
( )
Contents of registers and memories
—
Negate, Flag unchanged after executing instruction
RAM address pointed by the data pointer
M(DP)
a
Label indicating address a
p, a
Label indicating address a
in page p
p
5
4
C
Hex. C + Hex. number x (also same for others)
+
x
Contents
a
a
a
a
a
a
6
5
4
3
2
1
a
a
a
a
a
a
6
5
4
3
2
1
p
p
p
p
3
2
1
0
0
0
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