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APPLICATION
2.3 Timers
(3) Timer control register W1
The timer 1 count start synchronous circuit control bit is assigned to bit 0, the timer 1 control bit is
assigned to bit 1, the prescaler dividing ratio selection bit is assigned to bit 2, and the prescaler
control bit is assigned to bit 3.
Set the contents of this register through register A with the TW1A instruction. The TAW1 instruction
can be used to transfer the contents of register W1 to register A.
Table 2.3.3 shows the timer control register W1.
Table 2.3.3 Timer control register W1
Timer control register W1
W1
Prescaler control bit
3
Prescaler dividing ratio selection
W1
2
bit
W1
Timer 1 control bit
1
Timer 1 count synchronous circuit
W1
0
control bit
Note: "R" represents read enabled, and "W" represents write enabled.
(4) Timer control register W2
The timer 2 count source selection bits are assigned to bits 0 and 1, and the timer 2 control bit is
assigned to bit 3.
Set the contents of this register through register A with the TW2A instruction. The TAW2 instruction
can be used to transfer the contents of register W2 to register A.
Table 2.3.4 shows the timer control register W2.
Table 2.3.4 Timer control register W2
Timer control register W2
W2
3
Timer 2 control bit
W2
2
Not used
W2
1
Timer 2 count source selection
bits
W2
0
Note: "R" represents read enabled, and "W" represents write enabled.
2-28
at reset : 0000
2
0
Stop (state initialized)
1
Operating
0
Instruction clock divided by 4
Instruction clock divided by 16
1
0
Stop (state retained)
1
Operating
0
Count start synchronous circuit not selected
Count start synchronous circuit selected
1
at reset : 0000
2
Stop (state retained)
0
Operating
1
0
This bit has no function, but read/write is enabled.
1
W2
W2
1
0
0
0
Timer 1 underflow signal
0
1
Prescaler output
1
0
CNTR0 input
1
1
16-bit timer (WDT) underflow signal
4513/4514 Group User's Manual
at RAM back-up : 0000
at RAM back-up : state retained
Count source
R/W
2
R/W
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