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HARDWARE
PIN DESCRIPTION
MULTIFUNCTION
Pin
Multifunction
D
CNTR0
6
D
CNTR1
7
P2
S
0
CK
P2
S
1
OUT
P2
S
2
IN
P3
INT0
0
P3
INT1
1
Notes 1: Pins except above have just single function.
2: The input of D
, D
, P2
6
7
S
, S
, S
, INT0, INT1, and A
CK
OUT
IN
3: The 4513 Group does not have P4
CONNECTIONS OF UNUSED PINS
Pin
Open (when using an external clock).
X
OUT
Connect to V
VDCE
Connect to V
D
–D
0
5
D
/CNTR0
"0" and open.
6
D
/CNTR1
7
P2
/S
Connect to V
0
CK
P2
/S
1
OUT
P2
/S
2
IN
P3
/INT0
Connect to V
0
P3
/INT1
"0" and open.
1
P3
, P3
2
3
P4
/A
–P4
/A
Connect to V
0
IN4
3
IN7
"0" and open.
P5
–P5
(Note 1)
When the input mode is selected by soft-
0
3
ware, pull-up to V
pull-down to V
When selecting the output mode, open.
A
/CMP0-
Connect to V
IN0
A
/CMP0+
IN1
A
/CMP1-
IN2
A
/CMP1+
IN3
P0
–P0
Open or connect to V
0
3
P1
–P1
Open or connect to V
0
3
1-10
Pin
Multifunction
CNTR0
D
6
CNTR1
D
7
S
P2
CK
0
S
P2
OUT
1
S
P2
IN
2
INT0
P3
0
INT1
P3
1
–P2
, CMP0-, CMP0+, CMP1-, CMP1+ and the input/output of P3
0
2
–A
are selected.
IN0
IN7
/A
–P4
/A
.
0
IN4
3
IN7
Connection
.
SS
, or set the output latch to
SS
.
SS
, or set the output latch to
SS
, or set the output latch to
SS
through a resistor or
DD
.
DD
.
SS
(Note 2)
SS
(Note 2)
SS
4513/4514 Group User's Manual
Pin
Multifunction
A
CMP0-
IN0
A
CMP0+
IN1
A
CMP1-
IN2
A
CMP1+
IN3
P4
A
0
IN4
P4
A
1
IN5
P4
A
2
IN6
P4
A
3
IN7
, P3
, P4
–P4
0
1
0
Notes 1: After system is released from reset, port P5 is in an input mode (di-
rection register FR0 = 0000
2: When the P0
–P0
and P1
0
3
their pull-up transistors (register PU0i="0") and also invalidate the
key-on wakeup functions (register K0i="0") by software. When
these pins are connected to V
tions are left valid, the system fails to return from RAM back-up
state. When these pins are open, turn on their pull-up transistors
(register PU0i="1") by software, or set the output latch to "0."
Be sure to select the key-on wakeup functions and the pull-up
functions with every two pins. If only one of the two pins for the
key-on wakeup function is used, turn on their pull-up transistors by
software and also disconnect the other pin. (i = 0, 1, 2, or 3.)
(Note when the output latch is set to "0" and pins are open)
After system is released from reset, port is in a high-impedance state un-
til it is set the output latch to "0" by software. Accordingly, the voltage
level of pins is undefined and the excess of the supply current may occur
while the port is in a high-impedance state.
To set the output latch periodically by software is recommended because
value of output latch may change by noise or a program run away
(caused by noise).
(Note when connecting to V
and V
SS
Connect the unused pins to V
shortest distance against noise.
Pin
Multifunction
CMP0-
A
IN0
CMP0+
A
IN1
CMP1-
A
IN2
CMP1+
A
IN3
A
P4
IN4
0
A
P4
IN5
1
A
P4
IN6
2
A
P4
IN7
3
can be used even when CNTR0, CNTR1,
3
)
2
–P1
are connected to V
0
3
SS
while the key-on wakeup func-
SS
)
DD
and V
using the thickest wire at the
SS
DD
, turn off
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