Emi Features - Motorola DSP56009 User Manual

External Memory Interface
Introduction
4.1.2

EMI Features

The main features of the EMI are:
• Direct connection to several possible memory device configurations:
– One or two DRAM devices of 64 K × 4, 256 K × 4, 1 M × 4 or 4 M × 4 bits
– SRAM addressing with one device select and 256 K address range
– SRAM addressing with two device selects and 128 K address range
– SRAM addressing with four device selects and 32 K address range
– Additional SRAM or peripheral addressing with address range of 32 K
– Data bus can be 4 or 8 bits wide
– Data words can be 8, 12, 16, 20 or 24 bits long
– Automatic data pack/unpack to fit and orient external bus width and
external word length to internal 24-bit word format
• Programmable timing features:
– Independently selectable timing for SRAM or DRAM
– Automatic DRAM refresh by internal refresh timer
– Two timing modes for DRAM, sixteen timing modes for SRAM
• Address Features:
– Relative Addressing for data-delay buffers
– DRAM Absolute Addressing for efficient data storage
– Absolute Addressing for program bootstrap and overlays (SRAM or
EPROM), and to access external peripherals
– Two base registers to handle two delay buffers in parallel
– Base-offset address calculation for data-delay buffers
– Optional base address post update (increment)
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