Motorola DSP56009 User Manual page 206

24-bit digital signal processor
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Serial Audio Interface
Programming Considerations
As a result, when the WSR/WST transition appears earlier than expected, the
transition is ignored and the next pair of data words (right and left) is lost. Likewise,
when the WSR/WST transition appears later than expected, in the time period
between the completion of the previous word and the appearance of the late
WSR/WST transition, the data bits being received are ignored and no data is
transmitted.
These characteristics can be used to disable reception or transmission of undesired
data words by keeping SCKR (SCKT) running freely and gating WSR/WST for a
certain number of bit-clock cycles.
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DSP56009 User's Manual
MOTOROLA

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