Figure 4-11 Sram For Data Delay Buffers And For Bootstrap - Motorola DSP56009 User Manual

Figure 4-11 shows how to connect four 32 K × 8 SRAM devices for the data buffers
and an SRAM for program bootstrap or overlays. For applications requiring SRAM
devices for implementation of the data-delay buffers (e.g., for noise considerations)
and requiring addressing of more than 256 K × 8 physical locations, it is possible to
use the DRAM Addressing modes with a large array of SRAM devices. An external
latch must be used to demultiplex the row and column addresses and in this way to
obtain the SRAM address.

Figure 4-11 SRAM for Data Delay Buffers and for Bootstrap

MOTOROLA
MA[14:0]
MD[7:0]
MWR
MRD
MCS0
MCS1
MCS2
MCS3
DSP
(EMI)
DSP56009 User's Manual
External Memory Interface
EMI-to-Memory Connection
A[14:0]
A[14:0]
DQ[7:0]
A[14:0]
DQ[7:0]
SRAM
A[14:0]
DQ7:0
SRAM
MDM6206
DQ[7:0]
SRAM
MDM6206
W
SRAM
MDM6206
W
G
MCM6206
W
G
E
W
G
E
G
E
E
A[14:0]
DQ[7:0]
SRAM
MCM60256A
GPIO3
E
W
G
SRAM
Relative
Addressing
Absolute
Addressing
AA0261k
4-49