Figure 4-12 Replacing Drams With Srams For Large Arrays; Table 4-20 Maximum Dsp Clock Frequencies When Using Dram; Emi Timing - Motorola DSP56009 User Manual

External Memory Interface

EMI Timing

Figure 4-12 shows how to connect a 512 K × 8 SRAM to the EMI.
MA[14:0]
MRAS
DSP
(EMI)
MD[7:0]
MWR
MRD
MCAS

Figure 4-12 Replacing DRAMs with SRAMs for Large Arrays

4.8 EMI TIMING
Table 4-20 shows the maximum DSP clock frequencies while using typical DRAM
devices:

Table 4-20 Maximum DSP Clock Frequencies When Using DRAM

DRAM
MCM54400A—60 ns
MCM54400A—70 ns
4-50
MA[9:0]
D[9:0]
D–FF
IDT74FCT821A
CLK
DSP56009 User's Manual
Q[9:0]
A[18:0]
DQ[7:0]
IDTMP4008S
W
G
CS
Max Freq
66 MHz
81 MHz
50 MHz
81 MHz
DRAM
Relative
Addressing
AA0262k
EDTM
0
1
0
1
MOTOROLA