Figure 6-1 Sai Baud-Rate Generator Block Diagram; Serial Audio Interface Internal Architecture - Motorola DSP56009 User Manual

Serial Audio Interface

Serial Audio Interface Internal Architecture

• User programmable to support a wide variety of serial audio formats
• Three receive interrupt vectors: Receive Left Channel, Receive Right Channel,
and Receive with Exception
• Three transmit interrupt vectors: Transmit Left Channel, Transmit Right
Channel, and Transmit with Exception
6.2 SERIAL AUDIO INTERFACE INTERNAL ARCHITECTURE
The SAI is functionally divided into three parts: the baud-rate generator, the receiver
section, and the transmitter section. The receive and transmit sections are completely
independent and can operate concurrently or separately. The following paragraphs
describe the operation of these sections.
6.2.1 Baud-Rate Generator
The baud-rate generator produces the internal serial clock for the SAI if either or both
of the receiver and transmitter sections are configured in the Master mode. The
baud-rate generator is disabled if both receiver and transmitter sections are
configured as slaves. Figure 6-1 illustrates the internal clock path connections. The
receiver and transmitter clocks can be internal or external depending on the
configuration of the Receive Master (RMST) and Transmit Master (TMST) control
bits.
SCKT
TMST
SCKR
RMST
F
OSC

Figure 6-1 SAI Baud-Rate Generator Block Diagram

6-4
TMST = 0
TMST = 1
RMST = 0
RMST = 1
Internal Clock
Prescale
Divide Divide By 1
or
By 2
Divide By 8
PSR
DSP56009 User's Manual
TClock
Tx
RClock
Rx
Divider
Divide By 1
To
Divide By 256
PM0–PM7
AA0427k
MOTOROLA