Motorola DSP56009 User Manual page 128

24-bit digital signal processor
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External Memory Interface
EMI Operating Considerations
Example 4-4 Successive Memory-Write Transfers
The following procedure describes a sequence of successive memory-write
transfers. This procedure utilizes the pipeline property for better performance.
Note that EBARx should either be post-incremented by one after each write or a
new base address should be stored in EBARx before the write trigger, otherwise
the same word address (and the same physical addresses) will be written.
movep
#RAM,X:<<ECSR
movep
#OFF,X:<<EWOR
movep
#BAR0,X:<<EBAR0
movep
#DATA_1,X:<<EDWR0
movep
#DATA_2,X:<<EDWR0
-
-
-
movep
#DATA_3,X:<<EDWR0
-
-
-
movep
#DATA_4,X:<<EDWR0
4-44
; define the memory transfer mode
; store address offset to be used
; store base address
; trigger first memory write transfer
; trigger the second write transfer
; (pipelined)
; this will be pending until the
; previous transfer terminates
; perform other operations
; or poll EDWE for EDWR empty
; or wait a sufficient number of Icyc
; and then,
; trigger the next memory write
; transfer perform other operations
; or poll EDWE for EDWR empty
; or wait a sufficient number of Icyc
; and then,
; trigger the next memory write
; transfer
DSP56009 User's Manual
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