Motorola DSP56009 User Manual page 227

24-bit digital signal processor
Table of Contents

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Table B-3 Instruction Set Summary (Sheet 1 of 7)
Mnemonic
Syntax
ABS
D
ADC
S,D
ADD
S,D
ADDL
S,D
ADDR
S,D
AND
S,D
AND(I)
#xx,D
ASL
D
ASR
D
BCHG
#n,X:<aa>
#n,X:<pp>
#n,X:<ea>
#n,Y:<aa>
#n,Y:<pp>
#n,Y:<ea>
#n,D
BCLR
#n,X:<aa>
#n,X:<pp>
#n,X:<ea>
#n,Y:<aa>
#n,Y:<pp>
#n,Y:<ea>
#n,D
BSET
#n,X:<aa>
#n,X:<pp>
#n,X:<ea>
#n,Y:<aa>
#n,Y:<pp>
#n,Y:<ea>
#n,D
— indicates that the bit is unaffected by the operation
* indicates that the bit may be set according to the definition, depending on parallel move conditions
? indicates that the bit is set according to a special definition. See the instruction descriptions in
Appendix A of the DSP56000 Family Manual (DSP56KFAMUM/AD)
0 indicates that the bit is cleared
MOTOROLA
Parallel Moves
(parallel move)
(parallel move)
(parallel move)
(parallel move)
(parallel move)
(parallel move)
(parallel move)
(parallel move)
DSP56009 User's Manual
Programming Reference
Instruction
Osc.
Status Request
Program
Clock
Words
Cycles
S L E U N Z V C
1 + mv
2 + mv * * * * * * * —
1 + mv
2 + mv * * * * * * * *
1 + mv
2 + mv * * * * * * * *
1 + mv
2 + mv * * * * * * ? *
1 + mv
2 + mv * * * * * * * *
1 + mv
2 + mv * * — — ? ? 0 —
1
2
? ? ? ? ? ? ? ?
1 + mv
2 + mv * * * * * * ? ?
1 + mv
2 + mv * * * * * * 0 ?
1 + ea
4 + mvb ? ? ? ? ? ? ? ?
1 + ea
4 + mvb ? ? ? ? ? ? ? ?
1 + ea
4 + mvb ? ? ? ? ? ? ? ?
Bits:
B-7

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