Table 3-1 Internal Memory Configurations; Introduction - Motorola DSP56009 User Manual

3.1

INTRODUCTION

The DSP56009 program and data memories are independent, and the on-chip data
memory is divided into two separate memory spaces, X and Y. There are also two
on-chip data ROMs in the X and Y data memory spaces, and a bootstrap ROM that
can overlay part of the Program RAM. The data memories are divided into two
independent spaces to work with the two address ALUs to feed two operands
simultaneously to the Data ALU. Through the use of Program RAM Enable bits (PEA
and PEB) in the Operating Mode Register (OMR), four different memory
configurations are possible to provide appropriate memory sizes for a variety of
applications (see Table 3-1).
Memory
Program RAM
X data RAM
Y data RAM
Program ROM
X data ROM
Y data ROM
This section also includes details of the interrupt vectors and priorities and describes
the effect of a hardware reset on the PLL Multiplication Factor (MF).
3.2 DSP56009 DATA AND PROGRAM MEMORY
External memory cannot be accessed as a direct extension of the internal memory.
The internal data and program memory configurations are shown in Table 3-1.
MOTOROLA

Table 3-1 Internal Memory Configurations

No Switch Switch A
(PEA = 0, (PEA = 1,
PEB = 0) PEB = 0)
0.5 K
4.5 K
4.25 K
10.0 K
3.0 K
1.75 K
DSP56009 User's Manual
Memory, Operating Modes, and Interrupts
Switch B
(PEA = 0,
PEB = 1)
1.25 K 2.0 K
3.75 K 3.75 K
4.25 K 3.5 K
10.0 K 10.0 K
3.0 K 3.0 K
1.75 K 1.75 K
Introduction
Switch A + B
(PEA = 1,
PEB = 1)
2.75 K
3.0 K
3.5 K
10.0 K
3.0 K
1.75 K
3-3