Motorola DSP56009 User Manual page 126

24-bit digital signal processor
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External Memory Interface
EMI Operating Considerations
Example 4-3 Successive Memory-Read Transfers with ERTS = 1
The following procedure describes a sequence of successive memory-read
transfers when ERTS = 1. This procedure utilizes the pipeline property for better
performance. Note that the first two memory-read transfers are triggered by
writing to the EOR (ERTS = 0) and then switching over to triggering by reading the
EDRR (ERTS = 1). Since all subsequent read triggers are done by reading the
EDRR, this method of triggering is most efficient when combined with
post-increment of EBAR while keeping the offset constant.
movep
#RAM,X:<<ECSR
movep
#BAR0,X:<<EBAR0
movep
#OFF_1,X:<<EOR0
movep
#OFF_2,X:<<EOR0
bset
#ERTS,X:<<ECSR
-
-
movep
X:<<EDRR0,X0
-
-
-
movep
X:<<EDRR0,X0
-
-
-
movep
X:<<EDRR0,X0
-
-
movep
X:<<EDRR0,X0
bclr
#ERTS,X:<<ECSR
-
-
4-42
; define access mode with ERTS = 0
; define base address
; trigger first read transfer
; initiate the second read transfer
; (pipelined)
; typically OFF_1 = OFF_2
; change trigger mode: set ERTS = 1
; perform other operations
; or poll EDRF for EDRR full
; or wait a sufficient number of Icyc
; and then,
; read the data triggered by writing
; OFF_1 perform other operations
; or poll EDRF for EDRR full
; or wait a sufficient number of Icyc
; and then,
; read the data triggered by writing
; OFF_2 perform other operations
; or poll EDRF for EDRR full
; or wait a sufficient number of Icyc
; and then,
; read the data triggered by the first
; EDRR read.
; perform other operations
; or poll EDRF for EDRR full
; or wait a sufficient number of Icyc
; and then,
; read the data triggered by the
; second EDRR read
; read EDRR as required
; then when only two more reads
; are required, turn-off
; triggering from EDRR
; set ERTS=0 (turn off EDRR triggering)
; perform other operations
; or poll EDRF for EDRR full
; or wait a sufficient number of Icyc
; and then,
DSP56009 User's Manual
MOTOROLA

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