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; If MC:MB:MA = 001, the internal Program RAM is loaded with 768
; consecutive bytes from an EPROM connected to the EMI. The
; EPROM is located at the EMI address $0, when operating the EMI
; in the Absolute Addressing SRAM mode (EAM[3:0] = 0000). It is
; assumed that the EPROM is selected (enabled) through the GPIO3
; pin, which is driven low by this Bootstrap mode. The GPIO3
; output is programmed to be of the active high/active low type.
; The bytes will be condensed into 512 24-bit words and stored in
; contiguous Program RAM memory locations starting at P:$0. Note that
; the routine loads data starting with the least significant byte
; of P:$0.
epromld
movep
#$FC0085,x:ecsr
bset
#gdd3,x:gpior
do
#512,_loop1
movep
a1,x:eor0
jclr
#edrf,x:ecsr,*
movep
x:edrr0,p:(r0)+
_loop1
bset
#gd3,x:gpior
jmp
<exit
; This is the routine that loads from the Serial Host Interface.
; MC:MB:MA = 101—Bootstrap from SHI (SPI)
; MC:MB:MA = 111—Bootstrap from SHI (IIC)
; If MC:MB:MA = 1x1, the internal Program RAM is loaded with 512 words
; received through the Serial Host Interface (SHI). The SHI
; operates in the Slave mode, with the 10-word FIFO enabled, and
; with the HREQ pin enabled for receive operation. The word size
; for transfer is 24 bits. The SHI operates in the SPI or in the
; IIC mode, according to the Bootstrap mode.
shild
jclr
#mb,omr,shi_loop;
SPI
bset
#hi2c,r1
MOTOROLA
; EMI control
; EBW = 1, EWL1-EWL0 = 10,
; EAM2-EAM0 = 000, EINR = 1,
; EINW = 0, EIS1-EIS0 = 00,
; ERTS = 0, ETDM = 1,
; ESTM3-ESTM0 = 1111,
; EME = 1
; enable EPROM (GPIO3 = 0)
; GD[3:0] = 0000,
; GDD[3:0] = 1000,
; GC[3:0] = 0000
; trigger read
; wait for EDRR full
; store in Program RAM
; disable EPROM (GPIO3 = 1)
; GD[3:0] = 1000, GDD[3:0] = 1000,
; GC[3:0] = 0000
; Exit bootstrap ROM
;If MC:MB:MA = 101, then
; IIC (HI2C = 1)
DSP56009 User's Manual
Bootstrap ROM Contents
A-5
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