Motorola DSP56009 User Manual page 55

24-bit digital signal processor
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Table 2-8 Serial Host Interface (SHI) signals (Continued)
Signal
Signal Name
Type
HREQ
Input or
Output
MOTOROLA
State
during
Reset
Tri-stated
Host Request—This signal is an active low
Schmitt-trigger input when configured for the
Master mode, but an active low output when
configured for the Slave mode. When configured
for the Slave mode, HREQ is asserted to indicate
that the SHI is ready for the next data word
transfer and deasserted at the first clock pulse of
the new data word transfer. When configured for
the Master mode, HREQ is an input and when
asserted by the external slave device, it will trigger
the start of the data word transfer by the master.
After finishing the data word transfer, the master
will await the next assertion of HREQ to proceed
to the next transfer.
Note: This signal is tri-stated during hardware,
software, individual reset, or when the
HREQ[1:0] bits (in the HCSR) are cleared (no
need for external pull-up in this state).
DSP56009 User's Manual
Signal Descriptions
Serial Host Interface (SHI)
Signal Description
2-17

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