Serial Control Register (Scr) - Hitachi F-ZTAT H8/3039 Series Hardware Manual

11.2.6 Serial Control Register (SCR)

SCR enables the SCI transmitter and receiver, enables or disables serial clock output in
asynchronous mode, enables or disables interrupts, and selects the transmit/receive clock source.
Bit
TIE
Initial value
Read/Write R/W
Transmit interrupt enable
Enables or disables transmit-data-empty interrupts (TXI)
The CPU can always read and write SCR. SCR is initialized to H'00 by a reset and in standby
mode.
7 6
RIE TE
0 0
R/W R/W
Transmit enable
Enables or disables the transmitter
Receive interrupt enable
Enables or disables receive-data-full interrupts (RXI) and
receive-error interrupts (ERI)
5 4
RE MPIE
0 0
R/W R/W
Multiprocessor interrupt enable
Enables or disables multiprocessor
interrupts
Receive enable
Enables or disables the receiver
3 2
TEIE CKE1
0 0
R/W R/W
Clock enable 1/0
These bits select the
SCI clock source
Transmit end interrupt enable
Enables or disables transmit-
end interrupts (TEI)
1 0
CKE0
0 0
R/W
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