Input/Output Pins; Register Configuration - Hitachi F-ZTAT H8/3039 Series Hardware Manual

11.1.3 Input/Output Pins

The SCI has the serial pins for each channel as listed in table 11-1.
Table 11-1 SCI Pins
Channel Name
0 Serial clock pin
Receive data pin
Transmit data pin
1 Serial clock pin
Receive data pin
Transmit data pin

11.1.4 Register Configuration

The SCI has the internal registers as listed in table 11-2. These registers select asynchronous or
synchronous mode, specify the data format and bit rate, and control the transmitter and receiver
sections.
Table 11-2 Registers
Channel Address*
0 H'FFB0
H'FFB1
H'FFB2
H'FFB3
H'FFB4
H'FFB5
1 H'FFB8
H'FFB9
H'FFBA
H'FFBB
H'FFBC
H'FFBD
Notes: 1. Lower 16 bits of the address.
2. Only 0 can be written to clear flags.
330
Abbreviation
SCK
0
RxD
0
TxD
0
SCK
1
RxD
1
TxD
1
1
Name
Serial mode register
Bit rate register
Serial control register
Transmit data register
Serial status register
Receive data register
Serial mode register
Bit rate register
Serial control register
Transmit data register
Serial status register
Receive data register
I/O Function
Input/output SCI
Input SCI
Output SCI
Input/output SCI
Input SCI
Output SCI
Abbreviation R/W
SMR R/W
BRR R/W
SCR R/W
TDR R/W
SSR R/(W)*
RDR R
SMR R/W
BRR R/W
SCR R/W
TDR R/W
SSR R/(W)*
RDR R
clock input/output
0
receive data input
0
transmit data output
0
clock input/output
1
receive data input
1
transmit data output
1
Initial Value
H'00
H'FF
H'00
H'FF
2
H'84
H'00
H'00
H'FF
H'00
H'FF
2
H'84
H'00