Table A-4 Number of Cycles per Instruction (cont)
Instruction Mnemonic
MOV
MOV.W Rs, @aa:24
MOV.L #xx:32, ERd
MOV.L ERs, ERd
MOV.L @ERs, ERd
MOV.L @(d:16, ERs),
ERd
MOV.L @(d:24, ERs),
ERd
MOV.L @ERs+, ERd
MOV.L @aa:16, ERd
MOV.L @aa:24, ERd
MOV.L ERs, @ERd
MOV.L ERs, @(d:16,
ERd)
MOV.L ERs, @(d:24,
ERd)
MOV.L ERs, @–ERd
MOV.L ERs, @aa:16
MOV.L ERs, @aa:24
MOVFPE
MOVFPE @aa:16, Rd*
MOVTPE
MOVTPE Rs, @aa:16*
MULXS
MULXS.B Rs, Rd
MULXS.W Rs, ERd
MULXU
MULXU.B Rs, Rd
MULXU.W Rs, ERd
NEG
NEG.B Rd
NEG.W Rd
NEG.L ERd
NOP
NOP
NOT
NOT.B Rd
NOT.W Rd
NOT.L ERd
OR
OR.B #xx:8, Rd
OR.B Rs, Rd
OR.W #xx:16, Rd
OR.W Rs, Rd
OR.L #xx:32, ERd
OR.L ERs, ERd
586
Instruction
Branch
Fetch
Addr. Read
I
J
3
3
1
2
3
5
2
3
4
2
3
5
2
3
4
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
1
2
1
3
2
Stack
Byte Data
Operation
Access
K
L
1
1
Word Data
Internal
Access
Operation
M
N
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
12
20
12
20