Hitachi F-ZTAT H8/3039 Series Hardware Manual page 288

Contention between Buffer Register Write and Input Capture: If a buffer register is used for
input capture buffering and an input capture signal occurs in the T
capture takes priority and the write to the buffer register is not performed. See figure 8-69.
ø
Address
Internal write signal
Input capture signal
GR
BR
Figure 8-69 Contention between Buffer Register Write and Input Capture
278
Buffer register write cycle
T T
1 2
BR address
N
M
state of a write cycle, input
3
T
3
X
TCNT value
N