Hitachi F-ZTAT H8/3039 Series Hardware Manual page 286

Contention between Counter Clearing by Input Capture and Counter Increment: If an input
capture signal and counter increment signal occur simultaneously, the counter is cleared according
to the input capture signal. The counter is not incremented by the increment signal. The value
before the counter is cleared is transferred to the general register. See figure 8-67.
ø
Input capture signal
Counter clear signal
TCNT input clock
TCNT
GR
Figure 8-67 Contention between Counter Clearing by Input Capture and
276
N
Counter Increment
H'0000
N