Hitachi F-ZTAT H8/3039 Series Hardware Manual page 538

Table 18-6 Timing of On-Chip Supporting Modules (cont)
Condition A: V
CC
MHz, T
range specifications)
Condition B: V
CC
MHz, T
range specifications)
Condition C: V
CC
MHz, T
range specifications)
Item
SCI Transmit data
delay time
Receive data
setup time
(synchronous)
Receive data
hold time
(synchronous
clock input)
Receive data
hold time
(synchronous
clock output)
Ports Output data
and delay time
TPC
Input data setup
time
Input data hold
time
= 2.7 V to 5.5 V, AV
= –20°C to +75°C (regular specifications), T
a
= 3.0 V to 5.5 V, AV
= –20°C to +75°C (regular specifications), T
a
= 5.0 V ± 10%, AV
CC
= –20°C to +75°C (regular specifications), T
a
Condition A
8 MHz
Symbol Min
t —
TXD
t 100
RXS
t 100
RXH
0
t —
PWD
t 50
PRS
t 50
PRH
= 2.7 V to 5.5 V, V
CC
= 3.0 V to 5.5 V, V
CC
= 5.0 V ± 10%, V
SS
Condition B
10 MHz
Max Min Max
100 — 100
— 100 —
— 100 —
— 0 —
100 — 100
— 50 —
— 50 —
= AV = 0 V, ø = 2 MHz to 8
SS SS
= –40°C to +85°C (wide-
a
= AV = 0 V, ø = 2 MHz to 10
SS SS
= –40°C to +85°C (wide-
a
= AV = 0 V, ø = 2 MHz to 18
SS
= –40°C to +85°C (wide-
a
Condition C
18 MHz
Min Max Unit
— 100 ns
100 —
100 —
0 —
— 100 ns
50 —
50 —
Test
Conditions
Figure 18-18
Figure 18-14
531