Hitachi F-ZTAT H8/3039 Series Hardware Manual page 225

Bits 2 to 0—Timer Prescaler 2 to 0 (TPSC2 to TPSC0): These bits select the counter clock
source.
Bit 2 Bit 1
TPSC2 TPSC1
0 0
1
1 0
1
When bit TPSC2 is cleared to 0 an internal clock source is selected, and the timer counts only
falling edges. When bit TPSC2 is set to 1 an external clock source is selected, and the timer counts
the edge or edges selected by bits CKEG1 and CKEG0.
When channel 2 is set to phase counting mode (MDF = 1 in TMDR), the settings of bits TPSC2 to
TPSC0 in TCR2 are ignored. Phase counting takes precedence.
Bit 0
TPSC0 Function
0 Internal clock: ø
1 Internal clock: ø/2
0 Internal clock: ø/4
1 Internal clock: ø/8
0 External clock A: TCLKA input
1 External clock B: TCLKB input
0 External clock C: TCLKC input
1 External clock D: TCLKD input
(Initial value)
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