Hitachi F-ZTAT H8/3039 Series Hardware Manual page 290

ITU Operating Modes
Table 8-11 (a) ITU Operating Modes (Channel 0)
TSNC
Synchro-
Operating Mode nization
Synchronous preset SYNC0 = 1 —
PWM mode
Output compare A
Output compare B
Input capture A
Input capture B
Counter By compare
clearing match/input
capture A
By compare
match/input
capture B
Syn- SYNC0 = 1 —
chronous
clear
Legend: Setting available (valid). — Setting does not affect this mode.
Note: The input capture function cannot be used in PWM mode. If compare match A and compare match B occur simultaneously, the compare match signal is inhibited.
TMDR
Comple- Synchro-
mentary nized
MDF FDIR PWM PWM
— —
— — PWM0 = 1 —
— — PWM0 = 0 —
— — —
— — PWM0 = 0 —
— — PWM0 = 0 —
— — —
— — —
— —
Register Settings
TFCR TOCR
Reset-
Output
Buffer- Level
PWM ing XTGD Select
— — — —
— — — —
— — — —
— — — —
— — — —
— — — —
— — — —
— — — —
— — — —
TOER TIOR0
Master
Enable IOA IOB
—
*
— —
— IOA2 = 0
Other bits
unrestricted
— IOB2 = 0
Other bits
unrestricted
— IOA2 = 1
Other bits
unrestricted
— IOB2 = 1
Other bits
unrestricted
—
—
—
TCR0
Clear Clock
Select Select
CCLR1 = 0
CCLR0 = 1
CCLR1 = 1
CCLR0 = 0
CCLR1 = 1
CCLR0 = 1