Hitachi F-ZTAT H8/3039 Series Hardware Manual page 247

Example of Synchronization: Figure 8-27 shows an example of synchronization. Channels 0, 1,
and 2 are synchronized, and are set to operate in PWM mode. Channel 0 is set for counter clearing
by compare match with GRB0. Channels 1 and 2 are set for synchronous counter clearing. The
timer counters in channels 0, 1, and 2 are synchronously preset, and are synchronously cleared by
compare match with GRB0. A three-phase PWM waveform is output from pins TIOCA
and TIOCA . For further information on PWM mode, see section 8.4.4, PWM Mode.
2
Value of TCNT0 to TCNT2
GRB0
GRB1
GRA0
GRB2
GRA1
GRA2
H'0000
TIOCA
0
TIOCA
1
TIOCA
2
Cleared by compare match with GRB0
Figure 8-27 Synchronization (Example)
, TIOCA ,
0 1
Time
237