Hitachi F-ZTAT H8/3039 Series Hardware Manual page 292

Single-chip microcomputer
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Table 8-11 (c) ITU Operating Modes (Channel 2)
TSNC
Synchro-
Operating Mode
nization
Synchronous preset
SYNC2 = 1
PWM mode
Output compare A
Output compare B
Input capture A
Input capture B
Counter By compare
clearing match/input
capture A
By compare
match/input
capture B
Syn-
SYNC2 = 1
chronous
clear
Phase counting
mode
Legend:
Setting available (valid). — Setting does not affect this mode.
Note:
The input capture function cannot be used in PWM mode. If compare match A and compare match B occur simultaneously, the compare match signal is inhibited.
TMDR
Comple- Synchro-
mentary nized
MDF
FDIR PWM
PWM
PWM2 = 1 —
PWM2 = 0 —
PWM2 = 0 —
PWM2 = 0 —
MDF = 1
Register Settings
TFCR
TOCR
Reset-
Output
Buffer-
Level
PWM
ing
XTGD Select
TOER
TIOR2
Master
Clear
Enable IOA
IOB
Select
*
IOA2 = 0
Other bits
unrestricted
IOB2 = 0
Other bits
unrestricted
IOA2 = 1
Other bits
unrestricted
IOB2 = 1
Other bits
unrestricted
CCLR1 = 0
CCLR0 = 1
CCLR1 = 1
CCLR0 = 0
CCLR1 = 1
CCLR0 = 1
TCR2
Clock
Select

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