Hitachi F-ZTAT H8/3039 Series Hardware Manual page 634

Single-chip microcomputer
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TCSR—Timer Control/Status Register
Bit
OVF
Initial value
Read/Write
R/(W)
Timer enable
0
TCNT is initialized to H'00 and halted
1
TCNT is counting
Timer mode select
0 Interval timer: requests interval timer interrupts
1 Watchdog timer: generates a reset signal
Overflow flag
0 [Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF
1 [Setting condition]
TCNT changes from H'FF to H'00
Note: * Only 0 can be written to clear the flag.
628
7
6
WT/
IT
TME
0
0
*
R/W
R/W
5
4
0
1
H'A8
3
2
CKS2
CKS1
1
0
R/W
R/W
Clock select 2 to 0
CKS2 CKS1 CKS0 Description
0
0
1
1
0
1
WDT
1
0
CKS0
0
0
R/W
0
ø/2
1
ø/32
0
ø/64
1
ø/128
0
ø/256
1
ø/512
0
ø/2048
1
ø/4096

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