Clock Generation - Xilinx AC701 User Manual

Clock Generation

There are three clock sources available for the FPGA logic on the AC701 board (refer to
Table
Table 1-8: AC701 Board Clock Sources
The AC701 clocking diagram is shown in
AC701 Evaluation Board
UG952 (v1.2) August 28, 2013
1-8).
Clock Name Reference
System Clock
User Clock
User SMA Clock
(differential pair)
www.xilinx.com
SiT9102 2.5V LVDS 200 MHz Fixed Frequency
U51
Oscillator (Si Time). See
Si570 3.3V LVDS I
(Silicon Labs). Default power-on frequency
U34
156.250 MHz. See
page 24.
USER_SMA_CLOCK_P (net name).
J31
See User SMA Clock Input, page
USER_SMA_CLOCK_N (net name)
J32
See User SMA Clock Input, page 25
Figure 1-10.
Feature Descriptions
Description
System Clock Source, page
2
C Programmable Oscillator
Programmable User Clock Source,
25.
23.
21