Xilinx AC701 User Manual page 71

The AC701 board core and auxiliary voltages are listed in Table 1-25.
Table 1-31: AC701 Board Onboard Power System Devices
Reference
Device Type
Designator
UCD90120A
U8
(4 Rails)
LMZ22010TZ U49
TPS84621RUQ U53
TPS84320RUQ U54
TPS84621RUQ U55
UCD90120A
U9
(5 Rails)
TPS84621RUQ U56
TPS84320RUQ U57
TPS84621RUQ U58
TPS84320RUQ U59
TPS84320RUQ U60
LMZ12002 U46
TL1963ADCQR U62
TPS51200DR U37
TPS51200DR U36
TPS79433DCQ U61
TPS79433DCQ U63
ADP123 U10
REF3012 U35
Notes:
1. See Table 1-32
2. See Table 1-33
Monitoring Voltage and Current
Voltage and current monitoring and voltage control are available for the TI controlled
power rails through the Texas Instruments Fusion Digital Power Designer graphical user
interface (GUI). The two onboard TI UCD90120A power controllers (U8 at PMBus address
101 and U9 at address 102) are wired to the same PMBus. The PMBus connector, J2, is
provided for use with the TI USB Interface Adapter PMBus pod (TI part number EVM
USB-TO-GPIO) and associated TI Fusion Digital Power Designer GUI. This is the simplest
and most convenient way to monitor the voltage and current values for the power rail
listed in
In each of these the two tables (one per controller), the Power Good (PG) On Threshold is
the set-point at or above which the particular rail is deemed good. The PG Off Threshold is
the set-point at or below which the particular rail is no longer deemed good. The controller
AC701 Evaluation Board
UG952 (v1.2) August 28, 2013
Description
PMBus Controller - PMBus Addr = 101
10A 0.8V - 6V Adj. Switching Regulator
6A 0.6V - 5.5V Adj. Switching Regulator
3A 0.6V - 5.5V Adj. Switching Regulator
6A 0.6V - 5.5V Adj. Switching Regulator
PMBus Controller - PMBus Addr = 102
6A 0.6V - 5.5V Adj. Switching Regulator
3A 0.6V - 5.5V Adj. Switching Regulator
6A 0.6V - 5.5V Adj. Switching Regulator
3A 0.6V - 5.5V Adj. Switching Regulator
3A 0.6V - 5.5V Adj. Switching Regulator
2A 0.8V - 6V Adj. Linear Regulator
1.5A 1.21V - 5V Adj. LDO Linear Regulator
3A Source-Sink DDR Termination Regulator
3A Source-Sink DDR Termination Regulator
0.25A 1.2V - 5.5V Adj. LDO Linear Regulator
0.25A 1.2V - 5.5V Adj. LDO Linear Regulator
0.3A 0.8V - 5V Adj. Linear Regulator
50uA Fixed 1.25V Voltage Reference
Table 1-32 and Table 1-33. For more information, see
www.xilinx.com
Feature Descriptions
Power Rail Net Power Rail
Name Voltage
VCCINT 1.00V
VCCAUX 1.80V
VCCBRAM 1.00V
FPGA_1V5 1.50V
VCCO_VADJ 2.50V
VCC1V8/
1.80V
FPGA_1V8
VCC3V3/
3.30V
FPGA_3V3
MGTAVCC 1.00V
MGTAVTT 1.20V
VCC5V0 5.00V
VCC2V5 2.50V
VTTDDR 0.75V
DDR3_VTERM_
0.75V
R_0V75
V33D_CTL1 3.30V
V33D_CTL2 3.30V
XADC_VCC 1.85V
XADC_VREF 1.25V
Answer Record 54022.
Schematic
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