Clock Generation - Xilinx VC709 User Manual

The JTAG circuit details are shown in
X-Ref Target - Figure 1-6
VCC3V3
U26
Digilent
USB-JTAG
Module
R95 15Ω
JTAG_TDI
TDI
R96 15Ω
JTAG_TMS
TMS
R94 15Ω
JTAG_TCK
TCK
JTAG_TDO_LS
TDO

Clock Generation

The VC709 board provides six clock sources for the FPGA.
each clock.
VC709 Evaluation Board
UG887 (v1.6) March 11, 2019
VCC3V3
U19
SN74LV541A
Voltage
Translator
VCC3V3 VCC1V8
U7
SN74AVC2T45
Voltage
Translator
Figure 1-6: JTAG Circuit
www.xilinx.com
Figure 1-6.
FMC1_HPC_PRSNT_M2C_B
U27
FMC1_TDO_FPGA_TDI
FMC1_HPC_TMS_BUF
FMC1_HPC_TCK_BUF
VCC3V3 VCC1V8
U32
TXSO108E
Voltage
Translator
FMC1_PRSNT_M2C_B_LS
VCC3V3 VCC1V8
U46
SN74AVC1T45
Voltage
Translator
FPGA_TDI_BUF
FPGA_TMS_BUF
FPGA_TCK_BUF
VCC3V3 VCC1V8
U72
SN74AVC1T45
Voltage
Translator
Table 1-7
Feature Descriptions
J35
FMC1 HPC
Connector
PRSNT_L
FMC_TDI_BUF
TDI
TDO
TMS
TCK
U1
Virtex-7
FPGA
Bank 14
AM31
Bank 0
TDI
TMS
TCK
JTAG_TDO
TDO
UG855_c1_06_101714
lists the source devices for
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