Xilinx AC701 User Manual page 20

Chapter 1: AC701 Evaluation Board Features
When an FMC daughter card is attached to the AC701 board it is automatically added to
the JTAG chain through electronically controlled single-pole single-throw (SPST) switches
U27. The SPST switch is in a normally closed state and transitions to an open state when an
FMC daughter card is attached. Switch U27 adds an attached FMC HPC daughter card to
the FPGAs JTAG chain as determined by the FMC_HPC_PRSNT_M2C_B signal. The
attached FMC card must implement a TDI-to-TDO connection via a device or bypass
jumper in order for the JTAG chain to be completed to the FPGA U1.
The JTAG connectivity on the AC701 board allows a host computer to download
bitstreams to the FPGA using the Xilinx iMPACT software. In addition, the JTAG connector
allows debug tools such as the ChipScope™ Pro Analyzer or a software debugger to access
the FPGA. The iMPACT software tool can also indirectly program the Quad-SPI Flash
memory. To accomplish this, the iMPACT software configures the FPGA with a temporary
design to access and program the Quad-SPI Flash memory device. The JTAG circuit is
shown in
X-Ref Target - Figure 1-9
VCC3V3
U26
Digilent
USB-JTAG
Module
R95 15Ω
TDI
R96 15Ω
TMS
R94 15Ω
TCK
TDO
VCC3V3
J4
JTAG
Header
JTAG_TDI
TDI
JTAG_TMS
TMS
JTAG_TCK
TCK
JTAG_TDO
TDO
20
Figure 1-9.
U19
SN74LV541A
Buffer
Figure 1-9: JTAG Circuit
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VCC3V3
FMC1_HPC_PRSNT_M2C_B
FMC_TDI_BUF
U27
FMC1_TDO_FPGA_TDI
FMC1_HPC_TMS_BUF
FMC1_HPC_TCK_BUF
FPGA_TDI_BUF
FPGA_TCK_BUF
FPGA_TMS_BUF
FPGA_TDO
AC701 Evaluation Board
UG952 (v1.2) August 28, 2013
J30
FMC1 HPC
Connector
PRSNT_L
TDI
TDO
TMS
TCK
U1
Artix-7
FPGA
Bank 14
N16
Bank 0
TDI
TCK
TMS
TDO
UG952_c1_09_101512