Configuration Options - Xilinx AC701 User Manual

Evaluation board for the artix-7 fpga
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Configuration Options

The FPGA on the AC701 board can be configured using these methods:
See
The method used to configure the FPGA is controlled by the mode pins (M2, M1, M0)
setting selected through DIP switch SW1.
settings.
Table 1-36: Mode Switch SW1 Settings
Figure 1-48
X-Ref Target - Figure 1-48
AC701 Evaluation Board
UG952 (v1.2) August 28, 2013
Master SPI (uses the Quad-SPI Flash U7).
JTAG (uses the U26 Digilent USB-to-JTAG Bridge or J4 Download Cable connector).
USB JTAG Module, page 19
See UG480, 7 Series FPGAs XADC Dual 12-Bit 1MSPS Analog-to-Digital Converter User
Guide for further details on configuration modes.
Configuration
Mode Pins (M[2:0])
Mode
Master SPI
JTAG
shows mode switch SW1.
FPGA_M2
FPGA_M1
FPGA_M0
www.xilinx.com
for more information.
Table 1-36
lists the supported mode switch
Bus
Width
x1, x2, x4
001
x1
101
SW1
ON
1
NC
2
3
SDA03H1SBD
R339
R337
1.21K
1.21K
0.1W
0.1W
1%
1%
R338
1.21K
0.1 W
1%
GND
Figure 1-48: Mode Switch
Configuration Options
CCLK
Direction
Output
Not Applicable
FPGA_3V3
6
5
4
UG952_c1_41_072313
77

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