Sata Gtp/Gtx Transceiver Clock Generation; Sgmii / Loopback Gtp/Gtx Transceiver Clock Generation - Xilinx ML505 User Manual

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Table 1-31: Configurations for Clock Source and Frequency Options
DIP Switch SW6 [1:8] Value
N0 N1 N2
1 1 0
0 1 1
0 0 0
1 0 0
0 0 1
1 1 1
1 0 1
1 1 0
0 1 1
1 1 0
Notes:
1. Factory default setting.
2. A 1 equates to the DIP switch in the on position.
3. For Fibre Channel support, see
ML505/ML506/ML507 Evaluation Platform
UG347 (v3.1.1) October 7, 2009
Downloaded from Elcodis.com electronic components distributor
Input Ref
M0 M1 M2 SEL1 SEL0
0 0 1 0 1
0 0 1 0 1
0 0 1 0 1
0 0 1 0 1
1 1 0 1 0
1 1 0 1 0
0 1 0 1 0
0 1 0 1 0
0 1 0 1 0
1 1 0 1 0
Answer Record
The native output of the ICS843001-21 is LVPECL, so a resistor network is present to
change the voltage swing to LVDS levels. The LVDS output is then multiplexed out
through Series AC coupling capacitors to allow the clock input of the FPGA to set the
common mode voltage.

SATA GTP/GTX Transceiver Clock Generation

An Integrated Circuit Systems ICS844051-1 chip generates a high-quality, low-jitter,
75-MHz or 150-MHz LVDS clock from an inexpensive 25-MHz crystal oscillator. This clock
is sent to the GTP/GTX transceiver driving the SATA connectors. Jumper J56 sets the
SATA GTP/GTX transceiver clock frequency (see
capacitors are also present to allow the clock input of the FPGA to set the common mode
voltage.
Table 1-32: Configuration for SATA GTP/GTX Clock Signals
SATA Clock Signal
SATA Clock Frequency

SGMII / Loopback GTP/GTX Transceiver Clock Generation

An Integrated Circuit Systems ICS844021I chip generates a high-quality, low-jitter,
125-MHz LVDS clock from an inexpensive 25-MHz crystal oscillator. This clock is sent to
the GTPs driving the SGMII or onboard loopback interfaces. Series AC coupling capacitors
are also present to allow the clock input of the FPGA to set the common mode voltage.
M Divider N Divider
Clock
Value Value
(MHz)
19.44 32 4
19.44 32 8
19.44 32 1
19.44 32 2
25 25 5
25 25 10
25 24 6
25 24 4
25 24 8
25 25 4
24918.
Board Connection
Jumper J56
• Jumper Off = 75 MHz
• Jumper On = 150 MHz
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Detailed Description
Output
V
CO
Frequency Application
(MHz)
(MHz)
622.08 155.52 SONET
622.08 77.76 SONET
622.08 622.08 SONET
622.08 311.04 SONET
625 125 Gigabit Ethernet
625 62.5 Gigabit Ethernet
600 100 PCI Express
(1)
600 150
600 75
625 156.25 XAUI/SRIO
Table 1-32). Series AC coupling
SATA
SATA
47