Xilinx AC701 User Manual page 39

The Ethernet connections from the XC7A200T at U1 to the 88E1116R PHY device at U12 are
listed in
Table 1-16: Ethernet PHY U12 Connections to FPGA U1
AC701 Evaluation Board
UG952 (v1.2) August 28, 2013
Table 1-16 Ethernet PHY Connections to FPGA U1.
FPGA U1 Pin Number
T14
W18
U22
T15
T17
T18
U15
U16
U21
U14
V14
V16
V17
U17
V18
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Schematic Net Name
PHY_MDIO
PHY_MDC
PHY_TX_CLK
PHY_TX_CTRL
PHY_TXD3
PHY_TXD2
PHY_TXD1
PHY_TXD0
PHY_RX_CLK
PHY_RX_CTRL
PHY_RXD3
PHY_RXD2
PHY_RXD1
PHY_RXD0
PHY_RESET_B
Feature Descriptions
M88E1116R U12
Pin Name
45 MDIO
48 MDC
60 TX_CLK
63 TX_CTRL
62 TXD3
61 TXD2
59 TXD1
58 TXD0
53 RX_CLK
49 RX_CTRL
55 RXD3
54 RXD2
51 RXD1
50 RXD0
10 RESET_B
39