Xilinx AC701 User Manual page 67

Figure 1-43
X-Ref Target - Figure 1-43
U1
XC7A200T
FPGA
(Bank 15)
49.9
ADIP K16
10 pF
AD1N K17
49.9
49.9
AD9P M15
10 pF
AD9N L15
49.9
U1
XC7A200T
FPGA
(Bank 16)
A0 B25
A1 A25
A2 A23
Notes:
1. ..._XADC_P/N =Remote voltage sense.
2. ..._XADC_CS_P/N = Current Sense from op amp.
AC701 Evaluation Board
UG952 (v1.2) August 28, 2013
shows the XADC external multiplexer block diagram.
U14
ADG707BRU
DA
DB
A[2:0]
U13
ADG707BRU
DA
DB
A[2:0]
Figure 1-43: XADC External Multiplexer Block Diagram
www.xilinx.com
VCCINT_XADC_CS_P/N
S1A/B
VCCAUX_XADC_CS_P/N
S2A/B
VCCBRAM_XADC_CS_P/N
S3A/B
FPGA_1V5_XADC_P/N
S4A/B
FPGA_1V5_XADC_CS_P/N
S5A/B
VCCO_VADJ_XADC_P/N
S6A/B
VCCO_VADJ_XADC_CS_P/N
S7A/B
FPGA_1V8_XADC_P/N
S8A/B
FPGA_1V8_XADC_CS_P/N
S1A/B
FPGA_3V3_XADC_P/N
S2A/B
FPGA_3V3_XADC_CS_P/N
S3A/B
MGTAVCC_XADC_P/N
S4A/B
MGTAVCC_XADC_CS_P/N
S5A/B
MGTAVTT_XADC_P/N
S6A/B
MGTAVTT_XADC_CS_P/N
S7A/B
NC
S8A/B
Feature Descriptions
FPGA_1V5_SENSE_P
1.00 K
FPGA_1V5_XADC_P
(1.5V Scaled to 0.75V)
1.00 K
FPGA_1V5_XADC_N
GND
VCCO_VADJ_SENSE_P
3.01 K
VCCO_VADJ_XADC_P
(2.5V Scaled to 0.625V)
1.00 K
VCCO_VADJ_XADC_N
GND
FPGA_1V8_SENSE_P
3.01 K
FPGA_1V8_XADC_P
(1.8V Scaled to 0.45V)
1.00 K
FPGA_1V8_XADC_N
GND
MGTAVCC_SENSE_P
1.00 K
MGTAVCC_XADC_P
(1.0V Scaled to 0.5V)
1.00 K
MGTAVCC_XADC_N
GND
MGTAVTT_SENSE_P
1.00 K
MGTAVTT_XADC_P
(1.2V Scaled to 0.6V)
1.00 K
MGTAVTT_XADC_N
GND
FPGA_3V3_SENSE_P
3.01 K
FPGA_3V3_XADC_P
(3.3V Scaled to 0.825V)
1.00 K
FPGA_3V3_XADC_N
GND
UG952_c1_139_011813
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