Default Jumper Settings - Xilinx AC701 User Manual

Evaluation board for the artix-7 fpga
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Default Jumper Settings

The AC701 board default jumper configurations are listed in
Table A-3: AC701 Default Jumper Settings
AC701 Evaluation Board
UG952 (v1.2) August 28, 2013
Header
Jumper
J11
1-2
XADC VCCINT 4A range
J53
1-2
XADC_VCC5V0 = 5V
J9
1-2
REF3012 XADC_AGND L3 bypassed
J10
1-2
REF3012 XADC_AGND = GND
J63
None
Voltage Regulators Enabled
J52
None
Test Header, Not a Jumper
J5
1-2
EPHY U12.2 CONFIG2 = LOW
J8
1-2
VCCO_VADJ (FMC) Voltage = ON
J3
None
SPI SELECT = On-Board SPI Device
J6
1-2
SFP+ Enabled
J35
1-2
EPHY U12.3 CONFIG3 = HI
J36
None
EPHY U12.2 CONFIG2 Option Header
J37
None
EPHY U12.3 CONFIG3 Option Header
J43
2-3
XADC_VCC = ADP123 1.85V
J54
2-3
REF3012 V
J42
1-2
XADC_VREFP = REF3012 XADC_VREF
J38
1-2
SFP RX BW = FULL
J39
1-2
SFP TX BW = FULL
J12
3-4
PCIE Lane Width = 4
www.xilinx.com
Description
2-pin
3-pin
= XADC_VCC
IN
2x2
Default Jumper Settings
Table
A-3.
Schematic
Page
34
29
29
29
38
7
15
45
4
20
15
15
15
29
29
29
20
20
28
81

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