Xilinx AC701 User Manual page 93

Evaluation board for the artix-7 fpga
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AC701 Evaluation Board
UG952 (v1.2) August 28, 2013
#ROTARY
set_property PACKAGE_PIN N21 [get_ports ROTARY_PUSH]
set_property IOSTANDARD LVCMOS33 [get_ports ROTARY_PUSH]
set_property PACKAGE_PIN N22 [get_ports ROTARY_INCA]
set_property IOSTANDARD LVCMOS33 [get_ports ROTARY_INCA]
set_property PACKAGE_PIN P20 [get_ports ROTARY_INCB]
set_property IOSTANDARD LVCMOS33 [get_ports ROTARY_INCB]
#LEDs
set_property PACKAGE_PIN M26 [get_ports GPIO_LED_0]
set_property IOSTANDARD LVCMOS33 [get_ports GPIO_LED_0]
set_property PACKAGE_PIN T24 [get_ports GPIO_LED_1]
set_property IOSTANDARD LVCMOS33 [get_ports GPIO_LED_1]
set_property PACKAGE_PIN T25 [get_ports GPIO_LED_2]
set_property IOSTANDARD LVCMOS33 [get_ports GPIO_LED_2]
set_property PACKAGE_PIN R26 [get_ports GPIO_LED_3]
set_property IOSTANDARD LVCMOS33 [get_ports GPIO_LED_3]
#SMA
set_property PACKAGE_PIN M21 [get_ports USER_CLOCK_P]
set_property IOSTANDARD LVDS_25 [get_ports USER_CLOCK_P]
set_property PACKAGE_PIN M22 [get_ports USER_CLOCK_N]
set_property IOSTANDARD LVDS_25 [get_ports USER_CLOCK_N]
set_property PACKAGE_PIN J23 [get_ports USER_SMA_CLOCK_P]
set_property IOSTANDARD LVCMOS25 [get_ports USER_SMA_CLOCK_P]
set_property PACKAGE_PIN H23 [get_ports USER_SMA_CLOCK_N]
set_property IOSTANDARD LVCMOS25 [get_ports USER_SMA_CLOCK_N]
set_property PACKAGE_PIN T8 [get_ports USER_SMA_GPIO_P]
set_property IOSTANDARD LVDS_25 [get_ports USER_SMA_GPIO_P]
set_property PACKAGE_PIN T7 [get_ports USER_SMA_GPIO_N]
set_property IOSTANDARD LVDS_25 [get_ports USER_SMA_GPIO_N]
#FAN
set_property PACKAGE_PIN J25 [get_ports SM_FAN_TACH]
set_property IOSTANDARD LVCMOS25 [get_ports SM_FAN_TACH]
set_property PACKAGE_PIN J26 [get_ports SM_FAN_PWM]
set_property IOSTANDARD LVCMOS25 [get_ports SM_FAN_PWM]
#BUTTONS
set_property PACKAGE_PIN U4 [get_ports CPU_RESET]
set_property IOSTANDARD LVCMOS15 [get_ports CPU_RESET]
set_property PACKAGE_PIN P6 [get_ports GPIO_SW_N]
set_property IOSTANDARD LVCMOS15 [get_ports GPIO_SW_N]
set_property PACKAGE_PIN T5 [get_ports GPIO_SW_S]
set_property IOSTANDARD SSTL15 [get_ports GPIO_SW_S]
set_property PACKAGE_PIN R5 [get_ports GPIO_SW_W]
set_property IOSTANDARD SSTL15 [get_ports GPIO_SW_W]
set_property PACKAGE_PIN U6 [get_ports GPIO_SW_C]
set_property IOSTANDARD SSTL15 [get_ports GPIO_SW_C]
set_property PACKAGE_PIN U5 [get_ports GPIO_SW_E]
set_property IOSTANDARD SSTL15 [get_ports GPIO_SW_E]
#SWITCHES
set_property PACKAGE_PIN R8 [get_ports GPIO_DIP_SW0]
set_property IOSTANDARD SSTL15 [get_ports GPIO_DIP_SW0]
set_property PACKAGE_PIN P8 [get_ports GPIO_DIP_SW1]
set_property IOSTANDARD SSTL15 [get_ports GPIO_DIP_SW1]
set_property PACKAGE_PIN R7 [get_ports GPIO_DIP_SW2]
set_property IOSTANDARD SSTL15 [get_ports GPIO_DIP_SW2]
set_property PACKAGE_PIN R6 [get_ports GPIO_DIP_SW3]
set_property IOSTANDARD SSTL15 [get_ports GPIO_DIP_SW3]
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AC701 Board XDC File Listing
93

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