Xilinx AC701 User Manual page 97

AC701 Evaluation Board
UG952 (v1.2) August 28, 2013
set_property IOSTANDARD SSTL15 [get_ports DDR3_D37]
set_property PACKAGE_PIN A3 [get_ports DDR3_D38]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D38]
set_property PACKAGE_PIN C2 [get_ports DDR3_D39]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D39]
set_property PACKAGE_PIN C3 [get_ports DDR3_D40]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D40]
set_property PACKAGE_PIN D3 [get_ports DDR3_D41]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D41]
set_property PACKAGE_PIN A4 [get_ports DDR3_D42]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D42]
set_property PACKAGE_PIN B4 [get_ports DDR3_D43]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D43]
set_property PACKAGE_PIN C4 [get_ports DDR3_D44]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D44]
set_property PACKAGE_PIN D4 [get_ports DDR3_D45]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D45]
set_property PACKAGE_PIN D5 [get_ports DDR3_D46]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D46]
set_property PACKAGE_PIN E5 [get_ports DDR3_D47]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D47]
set_property PACKAGE_PIN F4 [get_ports DDR3_D48]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D48]
set_property PACKAGE_PIN G4 [get_ports DDR3_D49]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D49]
set_property PACKAGE_PIN K6 [get_ports DDR3_D50]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D50]
set_property PACKAGE_PIN K7 [get_ports DDR3_D51]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D51]
set_property PACKAGE_PIN K8 [get_ports DDR3_D52]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D52]
set_property PACKAGE_PIN L8 [get_ports DDR3_D53]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D53]
set_property PACKAGE_PIN J5 [get_ports DDR3_D54]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D54]
set_property PACKAGE_PIN J6 [get_ports DDR3_D55]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D55]
set_property PACKAGE_PIN G6 [get_ports DDR3_D56]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D56]
set_property PACKAGE_PIN H6 [get_ports DDR3_D57]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D57]
set_property PACKAGE_PIN F7 [get_ports DDR3_D58]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D58]
set_property PACKAGE_PIN F8 [get_ports DDR3_D59]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D59]
set_property PACKAGE_PIN G8 [get_ports DDR3_D60]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D60]
set_property PACKAGE_PIN H8 [get_ports DDR3_D61]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D61]
set_property PACKAGE_PIN D6 [get_ports DDR3_D62]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D62]
set_property PACKAGE_PIN E6 [get_ports DDR3_D63]
set_property IOSTANDARD SSTL15 [get_ports DDR3_D63]
set_property PACKAGE_PIN M4 [get_ports DDR3_A0]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A0]
set_property PACKAGE_PIN J3 [get_ports DDR3_A1]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A1]
set_property PACKAGE_PIN J1 [get_ports DDR3_A2]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A2]
set_property PACKAGE_PIN L4 [get_ports DDR3_A3]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A3]
set_property PACKAGE_PIN K5 [get_ports DDR3_A4]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A4]
set_property PACKAGE_PIN M7 [get_ports DDR3_A5]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A5]
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AC701 Board XDC File Listing
97