Configuration Of Power-On-Clear Circuit; Operation Of Power-On-Clear Circuit - NEC 78K0/KD1 Series User Manual

8-bit single-chip microcontrollers
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21.2 Configuration of Power-on-Clear Circuit

The block diagram of the power-on-clear circuit is shown in Figure 21-1.
V
V
DD
DD

21.3 Operation of Power-on-Clear Circuit

In the power-on-clear circuit, the supply voltage (V
V
, an internal reset signal is generated.
POC
Figure 21-2. Timing of Internal Reset Signal Generation in Power-on-Clear Circuit
Supply voltage (V
)
DD
POC detection voltage
(V
)
POC
2.7 V
Internal reset signal
CHAPTER 21 POWER-ON-CLEAR CIRCUIT
Figure 21-1. Block Diagram of Power-on-Clear Circuit
+
Detection
voltage source
(V
)
POC
) and detection voltage (V
DD
Preliminary User's Manual U16315EJ1V0UD
Internal reset signal
) are compared, and when V
POC
<
DD
Time
367

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